27–31 May 2024
OAU Campus, Ile-Ife, Nigeria
Africa/Lagos timezone

Analog CMOS Circuits for Convex Quadratic Programming

27 May 2024, 16:15
10m
AFRIGIST, Main - Conference Hall (OAU Campus, Ile-Ife, Nigeria)

AFRIGIST, Main - Conference Hall

OAU Campus, Ile-Ife, Nigeria

Road 1, O.A.U Campus
250
Computer Engineering Technical session 1

Speakers

Mr Emmanuel Innocent (Obafemi Awolowo University)Mr Emmanuel Egwu (Obafemi Awolowo University)Mr Victor Oluleti (Obafemi Awolowo University)

Description

Analog circuit design for nonlinear programming has been widely studied in the literature (Dennis, 1959;
Kennedy and Chua, 1988; Tank and Hopfield, 1986; Wilson, 1986). However, recent advances in edge computing
and in model predictive control have led to a resurgence of interest in analog programming circuits (Vichik and
Borrelli, 2014; Vichik et al., 2016; Bena et al., 2023). We develop electronic circuit analogs for emulating the
solution of convex Quadratic Programming (QP) problems. Quadratic programs are prevalent in engineering
and are often encountered in applications where solutions must be determined in real time using minimal
computational resources. Such applications include among others model predictive control (MPC) problems,
economic dispatch of power, and optimal routing in large-scale integration (VLSI) to mention a few.
We model the optimality conditions associated with such convex QP problems using energy-conservative laws
governing the flow of current and voltage distribution within a piecewise linear resistive-diode network. The
quiescent operating point for the ensuing circuit characterizes the optimal solution of the source QP problem.
The proposed work entails taking advantage of the inherent parallelism in analog circuits to emulate the
behaviour of the programming circuit on a high-speed analog circuit processor known as a Field Programmable
Analog Array (FPAA) board. This provides a high-level simulation-based mechanism for accessing the feasibility
of the programming circuit and for functional verification. Then the programming circuit is realized using a very
large-scale integration technology. An analog CMOS application-specific integrated circuit (ASIC) is developed
to realize the programming circuit in a 180nm process technology (Skibik and Adegbege, 2018; Ara´ujo et al.,
2024). Finally, we show, using tools from mathematical programming and circuit theory, that the circuit
solution coincides with the solution of the original QP program. We demonstrate the viability of the proposed
programming circuit using a real-life example of an economic dispatch problem.

Primary authors

Mr Emmanuel Innocent (Obafemi Awolowo University) Mr Emmanuel Egwu (Obafemi Awolowo University) Mr Victor Oluleti (Obafemi Awolowo University) Dr Abimbola Jubril (Obafemi Awolowo University) Prof. Ambrose Adegbege (Obafemi Awolowo University)

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